Know More About Me

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Over the past 16 years, I’ve dedicated my engineering career to advancing high-speed semiconductor interconnect design and verification. My work has focused on PCI Express (PCIe), where I’ve played a leading role in the architecture and implementation of multiple generations of PCIe Verification IP (VIP), from Gen1 through Gen7.

As a Principal Engineer at Synopsys, I’ve developed industry-first solutions that enable pre-silicon verification of advanced semiconductor designs with speed, accuracy, and compliance. My innovations are deeply rooted in the domain of Electronic Design Automation (EDA), where I apply scalable and standards-aligned methodologies to solve complex verification challenges. I take pride in building technologies that are not only technically robust but also improve efficiency and reduce risk for engineering teams around the world.

In addition to PCIe, I have made significant contributions to the verification of Compute Express Link (CXL), an emerging high-speed interconnect that complements PCIe and enables coherent memory sharing across CPUs, GPUs, and accelerators. I have implemented and tested advanced CXL features, including the Viral mechanism, and have authored peer-reviewed publications exploring AI-driven verification methodologies for CXL architectures. My work supports the seamless integration of CXL in next-generation data center and AI infrastructure.

I’m passionate about driving innovation, mentoring engineering teams, and contributing to global industry standards. I serve as an active contributor to PCI-SIG, where my work has been formally recognized and included in the PCIe Base Specification. I also participate as a peer reviewer, technical judge, and speaker, continually seeking to give back to the engineering community through thought leadership and collaboration.

Whether it is shaping the future of PCIe and CXL, enabling next-generation AI and HPC systems, or fostering technical excellence through collaboration, I’m committed to making a lasting impact in the semiconductor industry.